Various methods and embodiments of the invention relate generally to a Micro-Electro-Mechanical Systems (MEMS) device and particularly to a MEMS device integrally fabricated with CMOS devices.
High frequency devices, such as switches, radio frequency (RF) communication devices, and variable capacitors have been long manufactured using photolithography techniques. However, manufacturing of such high frequency devices presents challenges not otherwise experienced by other devices, such as accelerometers and sensors.
Capacitors are typically made of two plates, or electrodes, separated by a dielectric. A variable capacitor is made of the same except that one of the plates, or electrodes, is moveable thereby varying capacitance. MEMS devices readily implement variable capacitors.
A particular variable capacitor, namely, MEMS tunable capacitors with a moveable electrode are able to achieve high capacitance on-off ratios. However, existing designs often have to balance the actuation voltage against the possibility of self-actuation due to the RF signal passing through the capacitor. High actuation voltages are difficult to generate on-chip and can lead to undesirable effects such as dielectric break-down and arcing. However, if the actuation voltage is too low, the moveable capacitor electrode may move and self-actuate due to the effective direct current (DC) electrostatic force produced by the RF signal. Another issue with existing MEMS variable capacitor designs is integration with control electronics.
In some prior art designs, the variable capacitors have either been built on top of a CMOS wafer or using side-by-side system-in-package (SIP) module approach. The former approach has the disadvantage of requiring a very thick isolation layer between the CMOS and MEMS to avoid RF parasitics and potential process conflicts between the MEMS and CMOS processes. The latter SIP approach produces larger package size which is undesirable for space-conscious mobile applications. Finally, sealing the MEMS devices is challenging. In some approaches a silicon cap wafer with etched cavities may be bonded to the MEMS/CMOS wafer, however, this step may be expensive requiring multiple lithography and deposition steps.
Alternately, a sacrificial layer and dielectric cap layer with release holes may be deposited over the MEMS, followed by a sacrificial release and another deposition to seal the holes in the cap layer. This approach has two disadvantages: 1) The release process can be long and non-uniform due to the requirement to keep the release holes in the cap layer small, and 2) The resulting dielectric cap is thin and fragile and may be damaged by deposition of solder balls and printed circuit board (PCB) attachment thereby forcing a larger chip foot-print due to the requirement to place solder balls outside of the cap surface.
Accordingly, the need arises for MEMS devices integrally manufactured with CMOS devices and suitable for high frequency applications.